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qm48t50018 data sheet 36-75 vdc input, 50 a, 1.8 vdc output qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 1 of 13 the qmax tm series of high current single output dc/dc converters from di/dt sets new standards for thermal per- formance and power density in the quarter brick package. the 50a qm48 converters of the qmax tm series provide thermal performance in high te mperature environments that is comparable to or exceeds the industry?s leading 50a half bricks. this is accomplished through the use of patent pend- ing circuit, packaging and processing techniques to achieve ultra-high efficiency, excellent thermal management and a very low body profile. the qm48t50 converters have a power density more than twice that of competitors? 50a half bricks. over 2 square inches of board space can be saved for every slot in which a 50a half brick is replaced with a qm48t50 converter from di/dt. low body profile and the preclusion of heat sinks minimize impedance to system airflow, thus enhancing cooling for downstream devices. the use of 100% automation for as- sembly, coupled with di/dt?s advanced electric and thermal design, results in a product with extremely high reliability. operating from a 36-75 v input, the qmax tm series con- verters provide standar d output voltage for 1.8 v. output can be trimmed from ?20% to +10% of the nominal output volt- age, thus providing outstanding design flexibility. applications ? telecommunications ? data communications ? wireless ? servers qm48t50018 converter features ? delivers up to 50 a @ 1.8 v (90 w) ? industry-standard quarter brick pinout ? higher current capability at 70oc than most com- petitors? 50 a half bricks ? on-board input differential lc-filter ? high efficiency ? no heat sink required ? start up into pre-biased output ? no minimum load required ? lowest profile in industry: 0.31? [7.9 mm] ? lowest weight in industry: 1.1 oz [31.5 g] typical ? meets basic insulation requirements of en60950 ? withstands 100 v input transient for 100 ms ? fixed frequency operation ? fully protected ? remote output sense ? output voltage trim range: +10%/ ? 20% with industry- standard trim equations ? high reliability: mtbf of 2. 6 million hours, calculated per telcordia tr-332, method i case 1 ? positive or negative logic on/off option ? ul 60950 recognized in us and canada and demko certified per iec/en 60950 ? meets conducted emissions requirements of fcc class b and en 55022 class b with external filter ? all materials meet ul94, v-0 flammability rating
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 2 of 13 electrical specifications conditions: t a =25oc, airflow=300 lfm (1.5 m/s), vin=48 vdc, a ll output voltages, unless otherwise specified. parameter notes min typ max units absolute maximum ratings input voltage continuous 0 80 vdc operating ambient temperature -40 85 c storage temperature -55 125 c input characteristics operating input voltage range 36 48 75 vdc input under voltage lockout non-latching turn-on threshold 33 34 35 vdc turn-off threshold 31 32 33 vdc input voltage transient 100 ms 100 vdc isolation characteristics i/o isolation 2000 vdc isolation capacitance 1.4 nf isolation resistance 10 m ? feature characteristics switching frequency 415 khz output voltage trim range 1 industry-std. equations -20 +10 % remote sense compensation 1 percent of v out ( nom ) +10 % output over-voltage protection non-latching 117 128 140 % auto-restart period applies to all protection features 100 ms turn-on time 4 ms on/off control (positive logic) converter off -20 0.8 vdc converter on 2.4 20 vdc on/off control (negative logic) converter off 2.4 20 vdc converter on -20 0.8 vdc additional notes: 1. vout can be increased up to 10% via the sense leads or up to 10% via the trim function, however total output voltage trim fr om all sources should not exceed 10% of v out ( nom ), in order to insure specified operati on of over-voltage protection circuitry.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 3 of 13 electrical specifications (continued) conditions: t a =25oc, airflow=300 lfm (1.5 m/s), vin=48 vdc, vout=1.8 vdc unless otherwise specified. parameter notes min typ max units input characteristics maximum input current 50 adc, 1.8 vdc out @ 36 vdc in 2.98 adc input stand-by current vin = 48 v, converter disabled 3 madc input no load current (0 load on the output) vin = 48 v, converter enabled 41 madc input reflected-ripple current 25mhz bandwidth 7.5 ma pk-pk input voltage ripple rejection 120hz tbd db output characteristics output voltage set point (no load) 1.782 1.800 1.818 vdc output regulation over line 2 4 mv over load 2 4 mv output voltage range over line, load and temperature 2 1.773 1.827 vdc output ripple and noise - 25mhz bandwidth full load + 10 f tantalum + 1 f ceramic 30 50 mv pk-pk external load capacitance plus full load (resistive) 40,000 f output current range 0 50 adc current limit inception non-latching 59 64 adc peak short-circuit current non-latching. short=10m ? . 72 a rms short-circuit current non-latching 18 arms dynamic response load change 25% of iout max, di/dt = 1 a/s co = 470 f tantalum + 1 f ceramic 150 mv setting time to 1% 200 s efficiency 100% load 85 % 50% load 89 % additional notes: 2. -40oc to 85oc
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 4 of 13 operation input and output impedance these power converters have been designed to be stable with no external capacitors when used in low inductance in- put and output circuits. however, in many applications , the inductance associated with the distribution from the pow er source to the input of the converter can affect the stabilit y of the converter. the addi- tion of a 33 f electrolytic capacitor with an esr < 1 ? across the input helps ensure st ability of the converter. in many applications, the user has to use decoupling capaci- tance at the load. the power converter will exhibit stable op- eration with external load capacitance up to 40,000 f. on/off (pin 2) the on/off pin is used to turn the power converter on or off remotely via a system signal. there are two remote con- trol options available, positive logic and negative logic and both are referenced to vin(-). typical connections are shown in fig. a. rload vin control input vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) (top view) converter qmax tm series fig. a: circuit configuration for on/off function. the positive logic version turns on when the on/off pin is at a logic high and turns off when at a logic low. the con- verter is on when the on/off pin is left open . the negative logic version turns on when the pin is at a logic low and turns off when the pin is at a logic high. the on/off pin can be hard wired directly to vin(-) to enable automatic power up of the co nverter without the need of an external control signal. on/off pin is internally pulled-up to 5 v through a resistor. a mechanical switch, open collector transistor, or fet can be used to drive the input of the on/off pin. the device must be capable of sinking up to 0.2 ma at a low level volt- age of 0.8 v. an external voltage source ( 20 v maximum) may be connected directly to the on/off input, in which case it must be capable of sourcing or sinking up to 1 ma depending on the signal polarity. see the start-up informa- tion section for system timing waveforms associated with use of the on/off pin. remote sense (pins 5 and 7) the remote sense feature of the converter compensates for voltage drops occurring between the output pins of the con- verter and the load. the sense(-) (pin 5) and sense(+) (pin 7) pins should be connecte d at the load or at the point where regulation is required (see fig. b). 100 10 rw rw rload vin vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) (top view) converter qmax tm series fig. b: remote sense circuit configuration. if remote sensing is not required, the sense(-) pin must be connected to the vout(-) pin (pin 4), and the sense(+) pin must be connected to the vout(+) pin (pin 8) to ensure the converter will regulate at t he specified output voltage. if these connections are not made, the converter will deliver an output voltage that is slightly higher than the specified value. because the sense leads carry minimal current, large traces on the end-user board are not required. however, sense traces should be located close to a ground plane to minimize system noise and insure optimum performance. when wiring discretely, twisted pair wires should be used to connect the sense lines to the load to reduce susceptibility to noise. the converter?s output over-vol tage protection (ovp) senses the voltage across vout(+) and vout(-), and not across the sense lines, so the resistance (and resulting voltage drop) between the output pins of the converter and the load should be minimized to prevent unwanted triggering of the ovp. when utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power capabil- ity of the converter, equal to the product of the nominal out- put voltage and the allowable ou tput current for the given conditions.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 5 of 13 when using remote sense, the output voltage at the con- verter can be increased by as much as 10% above the nominal rating in order to maintain the required voltage across the load. therefore, the designer must, if necessary, decrease the maximum current (originally obtained from the derating curves) by the same percentage to ensure the con- verter?s actual output power remains at or below the maxi- mum allowable output power. output voltage adjust /trim (pin 6) the output voltage can be adjusted up 10% or down 20%, relative to the rated output voltage by the addition of an ex- ternally connected resistor. the trim pin should be left open if trimming is not being used. to minimize noise pickup, a 0.1 f capacitor is con- nected internally between the trim and sense(-) pins. to increase the output voltage, refer to fig. c. a trim resis- tor, r t-incr , should be connected between the trim (pin 6) and sense(+) (pin 7), with a value of: 10.22 1.225 ? 626 ? )v 5.11(100 r nom o incr t ? ? + = ? ? [k ? ] where, = ? incr t r required value of trim-up resistor k ? ] = ? nom o v nominal value of output voltage [v] 100 x v ) v (v ? nom - o nom - o req - o ? = [%] = ? req o v desired (trimmed) output voltage [v]. rload vin vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) r t-incr (top view) converter series qmax tm fig. c: configuration for incr easing output voltage . when trimming up, care must be taken not to exceed the converter?s maximum allowable output power. see previous section for a complete discussion of this requirement. to decrease the output voltage (fig. d), a trim resistor, r t-decr , should be connected between the trim (pin 6) and sense(-) (pin 5), with a value of: 10.22 | ? | 511 r decr t ? = ? [k ? ] where, = ? decr t r required value of trim-down resistor [k ? ] and ? is as defined above. note: the above equations for calculation of trim resistor values match those typically used in conventional industry- standard quarter bricks. for more information, see applica- tion note 103. rload vin vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) r t-decr (top view) converter series q ma x tm q ma x qmax tm fig. d: configuration for decreas ing output voltage. trimming/sensing beyond 110% of the rated output voltage is not an acceptable design practice, as this condition could cause unwanted triggering of the output over-voltage protec- tion (ovp) circuit. the designer should ensure that the dif- ference between the voltages ac ross the converter?s output pins and its sense pins does not exceed 10% of v out ( nom ) , or: x nom - o sense sense out out 10% v )] ( v ) ( [v )] ( v ) ( [v ? ? + ? ? ? + [v] this equation is applicable for any condition of output sens- ing and/or output trim.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 6 of 13 protection features input under-voltage lockout input under-voltage lockout is st andard with this converter. the converter will shut down when the input voltage drops below a pre-determined voltage. the input voltage must be typically 34 v for the converter to turn on. once the converter has been turned on, it will shut off when the input voltage drops below 31 v. this feature is beneficial in preventing deep discharging of batteries used in telecom applications. output over-current protection (ocp) the converter is protected agains t over-current or short cir- cuit conditions. upon sensing an over-current condition, the converter will switch to cons tant current operation and thereby begin to reduce output voltage. when the output voltage drops below 60% of the nominal value of output volt- age, the converter will shut down. once the converter ha s shut down, it will attempt to restart nominally every 100 ms with a typical 1-2% duty cycle. the attempted restart will continue indefinitely until the overload or short circuit conditions are removed or the output voltage rises above 60% of its nominal value. output over-voltage protection (ovp) the converter will shut down if the output voltage across vout(+) (pin 8) and vout(-) (pin 4) exceeds the threshold of the ovp circuitry. the ovp circuitry contains its own refer- ence, independent of the output voltage regulation loop. once the converter ha s shut down, it will attempt to restart every 100 ms until the ovp condition is removed. over-temperature protection (otp) the converter will shut dow n under an ove r-temperature condition to protect itself fr om overheating caused by opera- tion outside the thermal derating curves, or operation in ab- normal conditions such as system fan failure. after the con- verter has cooled to a safe operating temperature, it will automatically restart. safety requirements the converters meet north american and international safety regulatory requirements per ul60950 and en60950. basic insulation is provided between input and output. to comply with safety agencies requirements, an input line fuse must be used external to the converter. a 5-a fuse is recommended for use with this product. modules are ul approved for maximum fuse rating of 15-a. to protect a group of modules with a single fuse, the rating can be increased from the recommended values above. electromagnetic compatibility (emc) emc requirements must be met at the end-product system level, as no specific standards dedicated to emc character- istics of board mounted component dc-dc converters exist. however, di/dt tests its conver ters to several system level standards, primary of which is the more stringent en55022, information technology equipment - radio disturbance char- acteristics - limits and methods of measurement. effective internal lc differentia l filter significantly reduces input reflected ripple current, and improves emc. with the addition of a simple external filter, all versions of the qmax? series of converters pass the requirements of class b conducted emissions per en55022 and fcc, and meet at a minimum, class a radiated emissions per en 55022 and class b per fcc title 47cfr, part 15-j. please contact di/dt applications enginee ring for details of this test- ing. characterization general information the converter has been characterized for many operational aspects, to include thermal derating (maximum load current as a function of ambient temperature and airflow) for vertical and horizontal mounting, effici ency, start-up and shutdown parameters, output ripple and no ise, transient response to load step-change, overload and short circuit. the following pages contain specific plots or waveforms as- sociated with the converter. a dditional comments for specific data are provided below.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 7 of 13 test conditions all data presented were taken with the converter soldered to a test board, specifically a 0. 060? thick printed wiring board (pwb) with four layers. the top and bottom layers were not metalized. the two inner layers, comprising two-ounce cop- per, were used to provide traces for connectivity to the con- verter. the lack of metalization on the outer layers as well as the limited thermal connection ensured that heat transfer from the converter to the pwb was minimized. this provides a worst-case but consistent scenario for thermal derating pur- poses. all measurements requiring airflow were made in di/dt?s ver- tical and horizontal wind tunnel facilities using infrared (ir) thermography and thermocouples for thermometry. ensuring components on the converter do not exceed their ratings is important to maintaining high reliability. if one an- ticipates operating the converter at or close to the maximum loads specified in the derating curves, it is prudent to check actual operating temperatures in the application. thermo- graphic imaging is preferable; if this capability is not avail- able, then thermocouples may be used. di/dt recommends the use of awg #40 gauge thermocouples to ensure meas- urement accuracy. careful routing of the thermocouple leads will further minimize measurem ent error. refer to figure h for optimum measuring thermocouple location. thermal derating load current vs. ambient temperature and airflow rates are given in fig. 1 and fig. 2 for ve rtical and horizontal converter mounting. ambient temperature was varied between 25c and 85c, with airflow rates from 30 to 500 lfm (0.15 to 2.5 m/s). for each set of conditions, the maximum load current was defined as the lowest of: (i) the output current at which any fet junction temperature does not exceed a maximum spec ified temperature (120c) as indicated by the thermographic image, or (ii) the nominal rating of the converter (50 a). during normal operation, derati ng curves with maximum fet temperature less or equal to 120c should not be exceeded. temperature on the pcb at the thermocouple location shown in fig. h should not exceed 118c in order to operate inside the derating curves. fig. h: location of the thermocoup le for thermal testing. efficiency fig. 3 shows the efficiency vs. load current plot for ambient temperature of 25oc, airflow rate of 300 lfm (1.5 m/s) with vertical mounting and input voltages of 36 v, 48 v and 72 v. power dissipation fig. 4 shows the power dissipation vs. load current plot for ta = 25oc, airflow rate of 300 lfm (1.5 m/s) with vertical mounting and input voltages of 36 v, 48 v and 72 v. start-up output voltage waveforms, during the turn-on transient using the on/off pin for full rated load currents (resistive load) are shown without and with external load capacitance in fig. 5 and fig. 6, respectively. ripple and noise fig. 8 shows the output voltage ripple waveform, measured at full rated load current with a 10 f tantalum and 1 f ce- ramic capacitor across the output. note that all output volt- age waveforms are measured across a 1 f ceramic capaci- tor. the input reflected ripple current waveforms are obtained using the test setup shown in fig 9. the corresponding waveforms are shown in fig. 10 and fig. 11.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 8 of 13 start-up information (using negative on/off) scenario #1: initial start-up from bulk supply on/off function enabled, converte r started via application of v in . see figure e. time comments t 0 on/off pin is on; system front end power is toggled on, v in to converter begins to rise. t 1 v in crosses under-voltage lockout protection circuit threshold; converter enabled. t 2 converter begins to respond to turn-on command (con- verter turn-on delay). t 3 converter v out reaches 100% of nominal value. for this example, the total converter start-up time (t 3 - t 1 ) is typically 4 ms. scenario #2: initial start-up using on/off pin with v in previously powered, converter started via on/off pin. see figure f. time comments t 0 v input at nominal value. t 1 arbitrary time when on/off pin is enabled (converter enabled). t 2 end of converter turn-on delay. t 3 converter v out reaches 100% of nominal value. for this example, the total converter start-up time (t 3 - t 1 ) is typically 4 ms. scenario #3: turn-off and restart using on/off pin with v in previously powered, converter is disabled and then en- abled via on/off pin. see figure g. time comments t 0 v in and v out are at nominal values; on/off pin on. t 1 on/off pin arbitrarily disabled; converter output falls to zero; turn-on inhibit delay period (100 ms typical) is initiated, and on/off pin action is internally inhibited. t 2 on/off pin is externally re-enabled. if (t 2 - t 1 ) 100 ms , external action of on/off pin is locked out by start-up inhibit timer. if (t 2 - t 1 ) > 100 ms , on/off pin action is internally enabled. t 3 turn-on inhibit delay period ends. if on/off pin is on, converter begins turn-on; if off, converter awaits on/off pin on signal; see figure f. t 4 end of converter turn-on delay. t 5 converter v out reaches 100% of nominal value. for the condition, (t 2 - t 1 ) 100 ms , the total converter start-up time (t 5 - t 2 ) is typically 104 ms. for (t 2 - t 1 ) > 100 ms , start-up will be typically 4 ms after release of on/off pin. v in on/off state v out t t 0 t 1 t 2 t 3 on off fig. e: start-up scenario #1. on/off state v out t 0 t 1 t 2 t 3 on off v in t fig. f: start-up scenario #2. on/off state off on v out t 0 t 2 t 1 t 5 v in t t 4 t 3 100 ms fig. g: start-up scenario #3.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 9 of 13 ambient tem p erature [ c ] 20 30 40 50 60 70 80 90 load current [adc] 0 10 20 30 40 50 60 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1: available load current vs. ambient air temperature and airflow rates for qm48t50018 converter with b height pins mounted vertically with air flowing from pin 3 to pin 1, mosfet temperature 120 c, vin = 48 v. load current [adc] 0 102030405060 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 3: efficiency vs. load current and input voltage for con- verter mounted vertically with air flowing from pin 3 to pin 1 at a rate of 300 lfm (1.5 m/s) and ta = 25 c. a mbient tem p erature [ c ] 20 30 40 50 60 70 80 90 load current [adc] 0 10 20 30 40 50 60 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 2: available load current vs. ambient air temperature and airflow rates for qm48t50018 converter with b height pins mounted horizontally with air flowing from pin 3 to pin 1, mosfet temperature 120 c, vin = 48 v. load current [adc] 0 102030405060 p ower di ss i pa ti on [w] 0.00 4.00 8.00 12.00 16.00 20.00 72 v 48 v 36 v fig. 4: power dissipation vs. load current and input voltage for converter mounted vertically with air flowing from pin 3 to pin 1 at a rate of 300 lfm (1.5 m/s) and ta = 25 c.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 10 of 13 fig. 5: turn-on transient at full rated load current (resistive) with no output capacitor at vin = 48 v, triggered via on/off pin. top trace: on/off signal (5 v/div.). bottom trace: output voltage (1 v/div.) time scale: 2 ms/div. fig. 7: output voltage response to load current step-change (22.5 a ? 33.75 a ? 22.5 a) at vin = 48 v. top trace: output voltage (100 mv/div.). bottom trace: load current (10 a/div). current slew rate: 1 a/ s. co = 470 f tantalum + 1 f ce- ramic. time scale: 0.2 ms/div. fig. 6: turn-on transient at full rated load current (resistive) plus 40,000 f at vin = 48 v, triggered via on/off pin. top trace: on/off signal (5 v/div.). bottom trace: output voltage (1 v/div.). time scale: 2 ms/div. fig. 8: output voltage ripple (20 mv/div.) at full rated load cur- rent into a resistive load with co = 10 f tantalum + 1uf ce- ramic and vin = 48 v. time scale: 1 s/div.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 11 of 13 vout v source i s i c 1 f ceramic capacitor 10 h source inductance dc/dc converter 33 f esr <1 electrolytic capacitor ? q ma x series qmax tm fig. 9: test set-up for measuring input reflected ripple currents, i c and i s . fig. 10: input reflected ripple current, i s (10 ma/div), measured through 10 h at the source at full ra ted load current and vin = 48 v. refer to fig. 9 for test setup. time scale: 1 s/div. 18 72 iout [adc] vout [vdc] 0 0 36 54 3.0 2.5 1.0 0.5 2.0 1.5 fig. 12: output voltage vs. load current showing current limit point and converter shutdown poi nt. input voltage has almost no effect on current limit characteristic. fig. 11: input reflected ripple current, i c (100 ma/div), meas- ured at input terminals at full rated load current and vin = 48 v. refer to fig. 9 for test setup. time scale: 1 s/div. fig. 13: load current (top trace, 20 a/di v, 20 ms/div) into a 10 m ? short circuit during restart, at vin = 48 v. bottom trace (20 a/div, 2 ms/div) is an expansi on of the on-time portion of the top trace.
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 12 of 13 physical information side view top view 1 2 3 7 8 6 5 4 converter part numbering scheme product series input voltage mounting scheme rated load current output voltage on/off logic maximum height (ht) pin length (pl) special features qm 48 t 50 018 - n b a 0 quarter-brick format 36-75 v through- hole 50 a 018 ? 1.8 v n ? negative p ? positive a ? 0.325? b ? 0.358? d ? 0.422? a ? 0.188? b ? 0.145? c ? 0.110? 0 ? std the example above describes p/n qm48t50018-nba0: 36-75 v inpu t, through-hole mounting, 50 a @ 1.8 v output, negative on/off log ic, a maximum height of 0.358?, and a through the board pin length of 0.1 88?. please consult factory regar ding availability of a spec ific version. pin connections pin # function 1 vin (+) 2 on/off 3 vin (-) 4 vout (-) 5 sense(-) 6 trim 7 sense(+) 8 vout (+) ht (maximum height) cl (minimum clearance) pl (pin length) height option +0.000 [+0.00] -0.038 [-0.97] +0.016 [+0.41] -0.000 [-0.00] pin option 0.005 [0.13] a 0.325 [8.26] 0.030 [0.77] a 0.188 [4.77] b 0.358 [9.09] 0.063 [1.60] b 0.145 [3.68] d 0.422 [10.72] 0.127 [3.23] c 0.110 [2.79] ? all dimensions are in inches [mm] ? pins 1-3 and 5-7 are ? 0.040? [1.02] with ? 0.078? [1.98] shoulder ? pins 4 and 8 are ? 0.062? [1.57] without shoulder ? pin material: brass ? pin finish: tin/lead over nickel ? converter weight: 1.1 oz [31.5 g] typical
qm48t50018 36-75 vdc input, 50 a, 1.8 vdc output data sheet qm48t50018 fds rev 1 05-14-04 usa toll free 866 wow-didt page 13 of 13 for more information please contact di/dt , a power-one company 1822 aston avenue ?? carlsbad, ca ?? 92008 ?? usa usa toll free 866-wow-didt (969-3438) www.didt.com ?? support@didt.com the information and specifications c ontained in this data sheet are believed to be accurate and reliable at the time of publica tion. however, power-one, inc. assumes no responsibility for its use or for any infringements of patents or othe r rights of third parties, which may result from its use. no license is granted by i mplication or otherwise under any patent or patent rights of power-one, inc. specifications are subject to change wit hout notice. ?copyright power-one, inc. 2004

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